ASIC/RTL Design Engineer

  •  Reference Number: 417047
  •  Posted: 11/03/2026
  •  Job Type: Contract
  • Industry: Engineering

Our client, Semiconductor & SoC/IP Design is seeking a ASIC/RTL Design Engineer to join their team. As a ASIC/RTL Design Engineer, you will be part of the Engineering organization supporting the Digital Design & Low-Power Optimization team. The ideal candidate will have a passion for digital design and low-power optimization, strong analytical and methodical problem-solving skills, and the drive to collaborate across RTL, physical design, and verification to deliver timing- and power-closed silicon.

Job Title:ASIC/RTL Design Engineer

Location:Santa Clara, CA - Onsite Role

Pay Range: $80 on W2

What's the Job?

  • Drive low-power design strategies across complex SoC and IP designs, focusing on power reduction while maintaining product requirements.
  • Run synthesis and static timing analysis (STA) to achieve PPA targets (power, performance, and area) with reliable timing closure.
  • Analyze and optimize dynamic and leakage power using industry-standard EDA tools and proven low-power techniques.
  • Collaborate closely with RTL designers, physical design, and verification teams to ensure timing and power requirements are met end-to-end.
  • Execute low-power verification checks (UPF/CPF) and support sign-off activities for lint, CDC, synthesis, timing, and power closure.

What's Needed?

  • Strong background in ASIC synthesis and static timing analysis (STA), with hands-on experience driving timing closure.
  • Proficiency with industry-standard EDA tools such as Synopsys Design Compiler, PrimeTime, PrimePower, Power Artists, or equivalent.
  • Experience with power analysis and optimization techniques including clock gating, multi-Vt, power gating, and multi-voltage design.
  • Familiarity with UPF/CPF power intent specification and verification, including validating correct implementation.
  • Ability to automate and streamline power and timing workflows using scripting languages such as TCL, Perl, Python, or Shell.

What's in it for me?

  • Opportunity to work on cutting-edge silicon by combining low-power strategy, synthesis, STA, and power verification into a single impact loop.
  • A collaborative environment where you’ll partner with RTL, physical design, and verification teams to solve complex timing and power challenges.
  • Room to grow through knowledge sharing—learning new flows, improving methodologies, and contributing to team best practices.
  • Chance to strengthen your automation skills by streamlining power and timing workflows for greater efficiency.
  • Meaningful ownership of sign-off readiness, including lint, CDC, synthesis, timing, and power closure support.

Upon completion of waiting period consultants are eligible for:

  • Medical and Prescription Drug Plans
  • Dental Plan
  • Vision Plan
  • Health Savings Account
  • Health Flexible Spending Account
  • Dependent Care Flexible Spending Account
  • Supplemental Life Insurance
  • Short Term and Long Term Disability Insurance
  • Business Travel Insurance
  • 401(k), Plus Match
  • Weekly Pay

If this is a role that interests you and you'd like to learn more, click apply now and a recruiter will be in touch with you to discuss this great opportunity. We look forward to speaking with you!

About ManpowerGroup, Parent Company of: Manpower, Experis, Talent Solutions, and Jefferson Wells.

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