Silicon Validation Engineer 3

Our client is s seeking a Validation engineer to join their team and must be local to Silicon Valley, CA area. 

Job Title: Validation Engineer

Location: Silicon Valley, CA

Pay Range: $59-$63/hr

What’s the Job?

Purpose of the Team: The purpose of this team is to develop and validate the silicon chips that power Azure cloud services and AI workloads.

• Key projects: This role will contribute to hands-on silicon validation activities for the team's chip development efforts, supporting the testing and validation of silicon hardware used in Microsoft's Azure and AI infrastructure. The contractor will work onsite in the lab and perform highly technical, hands-on work aligned with the skills outlined in the job description.

Candidate Requirements
• Disqualifiers: Candidates who cannot work onsite daily at the Mountain View campus and candidates with a history of multiple short-term contracts without sufficient explanation may not be a fit for this role.

• Best vs. Average: The ideal resume would contain strong hands-on experience in SoC verification, FPGA/emulation platform bring-up, post-silicon validation, embedded software development, and hardware debug, with demonstrated expertise in C/C++, Python scripting, SystemVerilog-based verification environments, and industry-standard protocols such as AMBA, JTAG, SPI, I2C/I3C, and USB. Candidates should also have experience collaborating across architecture, design, firmware, and validation teams and possess a deep understanding of silicon and computer architecture.

Hard Skills Assessments
• Expected Dates that Hard Skills Assessments will be scheduled: ASAP
• Hard Skills Assessment Process: The assessment process will include two rounds with sponsor and FTE, panel style.
• Required Candidate Preparation: Candidates should have technical knowledge and hands-on experience relevant to the required silicon validation skill set and be prepared to demonstrate those skills during a highly technical assessment.

The candidate for this position will be expected and able to complete the following responsibilities:
• Develop C and C++ based test content, low-level drivers, and custom firmware at the subsystem and SoC levels, including self-checking tests that run on embedded processors.
• Extend the compile and build flow to support custom firmware-style tests.
• Serve as a technical owner for the team's FPGA prototyping platforms (such as HAPS or Xilinx): create board images and bit files. Design additional custom FPGA RTL for protocol interfaces and feature enablement. Release stable platforms to the firmware team and keep them working as the design evolves.
• Develop and extend custom python tooling to interface with the FPGA platform.
• Debug FPGA and post-silicon issues using tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters
• Drive post-silicon bring-up and validation in the lab: run the validation suites on first silicon, meet bring-up exit criteria on schedule, and debug platform issues such as JTAG failures, UART connectivity, and boot failures alongside the design, firmware, hardware, and security teams.
• Root-cause failing post-silicon tests to closure, collecting and analyzing scan dumps for low-level issues such as boot ROM and built-in self-test bugs, coordinating cross-team debug, and delivering fixes such as handling fatal errors, correcting driver access violations, and reconciling registers modified by boot firmware.

Preferred Qualifications:
• Experience developing C and C++ test content for subsystem and SoC verification, including bare-metal and firmware-style tests, with working knowledge of SystemVerilog testbenches.
• Experience bringing up and maintaining FPGA prototyping or emulation platforms (such as HAPS or Xilinx), including board images, platform tooling, and testbench changes that enable firmware and validation teams.
• Hands-on hardware debug experience with tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters
• Experience with post-silicon bring-up and validation, including running test suites on silicon and debugging boot, platform, and connectivity issues in a lab environment.
• Proficiency in Python, or a similar scripting language such as Perl or Ruby, for test automation, build flows, and log or data parsing.
• In-depth knowledge of verification principles, testbench architecture, and stimulus generation, with a track record of debugging complex designs.
• Experience with low-level and embedded software, including assembly, startup code, linker scripts, and Makefile-based build flows.
• Familiarity with industry protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, and USB.
• Experience collaborating across architecture, design, firmware, and validation teams, with strong communication skills.
• Strong understanding of silicon and/or computer architecture.

If this is a role that interests you and you’d like to learn more, click apply now and a recruiter will be in touch with you to discuss this great opportunity. We look forward to speaking with you!

About ManpowerGroup, Parent Company of:  Manpower, Experis and Talent Solutions

Experis® is a global leader in technology services and part of the ManpowerGroup® (NYSE: MAN) family of brands. We connect skilled technology professionals with meaningful opportunities where they can grow their careers, expand their expertise and make a real impact. Guided by the belief that it takes Human Ingenuity to unlock the true potential of technology, Experis helps people gain experience with leading organizations, build sought-after skills and take the next step toward a brighter future. Backed by ManpowerGroup's 75+ years of workforce expertise and global reach across more than 70 countries and territories, Experis brings the scale, insight and opportunity to help people and businesses thrive. ManpowerGroup is consistently recognized for its commitment to inclusion, ethics and responsible business, including being named one of the World's Most Ethical Companies. Learn more at Experis.com.